The latest IP Update for ISE Design Suite 11, IP_11.3, adds pre-production support for these two new device families:
The release also includes updates to these other popular IP cores:
New Cores | Additional License Required | Datasheet (PDF) | Spartan 3E | Spartan 3A/3AN | Spartan 3A DSP | Spartan 6 | Virtex 4 | Virtex 5 | Virtex 6 |
Audio, Video & Image Processing | |||||||||
Video DMA (v1.0) | ✓ | DS730 | ✓ | ✓ | |||||
On-Screen Display (v1.0) | ✓ | DS728 | ✓ | ✓ | |||||
Communications & Networking | |||||||||
RXAUI (v1.1) | * | DS740 | ✓ | ||||||
FPGA Features & Design | |||||||||
SelectIO Interface Wizard (v1.1) | DS746 | ✓ | |||||||
Virtex 6 FPGA GTH Transceiver Wizard (v1.1) | DS738 | ✓ | |||||||
New Cores Versions | Additional License Required | Datasheet (PDF) | Spartan 3E | Spartan 3A/3AN | Spartan 3A DSP | Spartan 6 | Virtex 4 | Virtex 5 | Virtex 6 |
Audio, Video & Image Processing | |||||||||
Video Scaler (v2.0) | ✓ | DS724 | ✓ | ✓ | ✓ | ||||
Automotive & Industrial | |||||||||
CAN (v3.1) | ✓ | DS265 | ✓ | ✓ | ✓ | ✓ | ✓ | ||
Communication & Networking | |||||||||
Aurora | |||||||||
Aurora 64B/66B (v3.1) | DS528 | ✓ | ✓ | ||||||
Error Correction | |||||||||
3GPP LTE MIMO Encoder (v2.0) | ✓ | XMP026 | ✓ | ✓ | |||||
Ethernet | |||||||||
Ethernet AVB Endpoint (v2.2) | ✓ | DS677 | ✓ | ✓ | ✓ | ✓ | |||
10 Gigabit Ethernet MAC (v9.3) | ✓ | DS201 | ✓ | ✓ | ✓ | ||||
Ethernet Statistics (v3.3) | * | DS323 | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ |
Ethernet 1000BASE-X PCS/PMA or SGMII (v10.3) | * | DS264 | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ |
Tri-mode Ethernet Media Access Controller (TEMAC) (v4.3) | ✓ | DS297 | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ |
Virtex 6 Embedded Tri-mode Ethernet MAC Wrapper (v1.3) | ✓ | DS710 | ✓ | ||||||
XAUI (v9.1) | * | DS266 | ✓ | ✓ | ✓ | ✓ | |||
Telecommunications | Additional License Required | Datasheet (PDF) | Spartan 3E | Spartan 3A/3AN | Spartan 3A DSP | Spartan 6 | Virtex 4 | Virtex 5 | Virtex 6 |
SPI-4.2 (v9.3) | ✓ | DS209 | ✓ | ✓ | ✓ | ||||
SPI-3 Link Layer Interface Multi-Channel (v6.1) | ✓ | DS504 | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | |
Wireless | |||||||||
CPRI™ (v2.3) | ✓ | DS611 | ✓ | ✓ | |||||
OBSAI (v3.3) | ✓ | DS612 | ✓ | ✓ | |||||
Digital Signal Processing | |||||||||
Cascaded Integrator Comb (CIC) Compiler (v1.3) | DS613 | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | |
DDS Compiler (v4.0) | DS558 | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | |
Multiply Generator (v11.2) | DS255 | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | |
FPGA Features & Design | |||||||||
Clock Wizard (v1.10) | DS709 | ✓ | ✓ | ||||||
Spartan™ 6 FPGA GTP Transceiver Wizard (v1.3) | DS713 | ✓ | |||||||
Virtex 6 FPGA GTX Transceiver Wizard (v1.3) | DS708 | ✓ | |||||||
Memories & Storage Elements | |||||||||
Block Memory Generator (v3.3) | DS512 | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | |
Distributed Memory Generator (v4.2) | DS322 | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ||
FIFO Generator (v5.3) | DS317 | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | |
Memory Interface Generator (MIG) (v3.2) | MIG | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | |
Standard Bus Interfaces | |||||||||
PCI™ | Additional License Required | Datasheet (PDF) | Spartan 3E | Spartan 3A/3AN | Spartan 3A DSP | Spartan 6 | Virtex 4 | Virtex 5 | Virtex 6 |
32-bit Initiator/Target for PCI (v4.10) | ✓ | DS206 | ✓ | ✓ | |||||
32-bit Initiator/Target for PCI (v3.0) Build 167 | ✓ | DS206 | ✓ | ✓ | ✓ | ✓ | |||
64-bit Initiator/Target for PCI (v4.10) | ✓ | DS205 | ✓ | ✓ | |||||
64-bit Initiator/Target for PCI (v3.0) Build 167 | ✓ | DS205 | ✓ | ✓ | ✓ | ✓ | |||
PCI Express® | |||||||||
Spartan 6 FPGA Integrated Endpoint Block for PCI Express (v1.2) | * | DS718 | ✓ | ||||||
Virtex 6 FPGA Integrated Block for PCI Express (v1.3) | * | DS715 | ✓ | ||||||
Virtex 5 Endpoint Block Plus for PCI Express (v1.12) | * | DS551 | ✓ | ||||||
RapidIO | |||||||||
Serial RapidIO Physical Layer Interface (v5.4) | ✓ | DS696 | ✓ | ✓ | ✓ | ✓ | |||
Serial RapidIO Logical I/O & Transport Layer Interface (v5.4) | ✓ | DS696 | ✓ | ✓ | ✓ | ✓ |
Also see the Master IP Release Notes Guide for details on Known Issues.
*Included with ISE at no additional charge
Comments, Questions, or Problems? Please enter a WebCase (Internet Explorer is required)